Key Highlights

  • Adisyn (ASX:AI1) has successfully demonstrated low-temperature graphene deposition across a full 200mm semiconductor wafer.
  • Independent testing confirmed graphene presence at all 12 sampled locations across the wafer using Raman spectroscopy and transmission electron microscopy.
  • The milestone represents a significant scale increase from previous 1cm² laboratory demonstrations.
  • The achievement supports future device integration testing, industry engagement and evaluation of larger wafer formats.

Adisyn Ltd (ASX:AI1) has achieved a major milestone in the development of its graphene semiconductor technology platform after successfully depositing low-temperature graphene across a full 200mm copper semiconductor wafer.

The achievement represents a significant progression from previous laboratory-scale testing and demonstrates the company’s ability to apply its graphene deposition process across an industry-recognised wafer format used in semiconductor manufacturing.

The deposition process was completed at temperatures below 300°C, with independent testing confirming graphene across multiple locations on the wafer. The result provides additional technical data as Adisyn continues development of its advanced materials platform for potential semiconductor applications.

Independent Testing Confirms Full Wafer Graphene Coverage

Following completion of the deposition process, Adisyn selected 12 sampling locations across all four quadrants of the 200mm wafer. The locations were positioned at different distances from the wafer centre to evaluate graphene deposition consistency.

Each sampled area underwent Raman spectroscopy measurements, with five separate measurements conducted at every location. Samples were also examined using transmission electron microscopy (TEM) at the Hebrew University of Jerusalem.

The testing identified graphene at all 12 sampled locations, supporting the successful deposition of graphene across the full wafer diameter. The independent verification provides additional information regarding the performance and repeatability of Adisyn’s low-temperature deposition technology.

Scaling Technology from Laboratory Samples to Semiconductor Formats

The transition from a 1cm² coupon to a 200mm wafer represents a significant expansion in the area processed through a single deposition run.

The 200mm wafer has a surface area of approximately 314cm², which is around 300 times larger than the company’s previously announced coupon-scale demonstration. Scaling materials technologies from laboratory samples to semiconductor-compatible formats requires improvements in process control, uniformity assessment and repeatability.

Adisyn’s achievement establishes a platform for further development activities, including process refinement, reliability assessment and potential integration studies with semiconductor applications.

Potential Role of Graphene in Advanced Semiconductor Applications

Graphene is being investigated globally for applications involving semiconductor interconnects and hybrid graphene-metal structures due to its electrical conductivity and thermal characteristics.

As semiconductor devices become increasingly compact, manufacturers are exploring materials that may help address performance and reliability challenges associated with conventional interconnect technologies.

Advanced artificial intelligence, high-performance computing and memory devices represent areas where next-generation semiconductor materials continue to receive industry attention. These applications commonly use larger 300mm wafer formats, making the successful 200mm demonstration an important development step toward potential future scaling.

Adisyn is assessing opportunities for technology integration, licensing arrangements, joint development programs and materials supply models. The company has stated that additional development, customer qualification and device integration activities are required before commercial outcomes can be evaluated.

Development Pathway Focused on Further Validation

Following the 200mm wafer milestone, Adisyn plans to continue refining and repeating its graphene deposition process to evaluate uniformity, defect levels and reproducibility.

The company will also undertake additional technical assessments, including initial reliability evaluations for potential applications and engagement with prospective semiconductor industry partners.

Future development efforts are expected to focus on progressing toward larger wafer formats, including the 300mm wafers used in advanced semiconductor manufacturing environments.

Expanding Advanced Materials Opportunities

Adisyn’s graphene technology initiative forms part of a broader strategy focused on advanced materials applications. The company is developing a patented low-temperature Atomic Layer Deposition (ALD) process intended to enable direct graphene growth on semiconductor wafers.

Beyond semiconductor applications, Adisyn is also exploring graphene-based composite materials for specialised applications, including technologies designed for reduced radar signatures in unmanned aerial vehicle and defence-related platforms.

The company also operates an information technology services division providing managed IT, cloud, cybersecurity and artificial intelligence solutions to Australian businesses.

Conclusion

Adisyn’s successful graphene deposition across a full 200mm semiconductor wafer represents an important technical milestone in scaling its advanced materials platform. Independent verification across multiple wafer locations provides further insight into the capability of the company’s low-temperature deposition process. Continued testing, process refinement and industry engagement will determine the future commercial pathways for the technology as Adisyn evaluates broader semiconductor applications.