Highlights

  • dorsaVi has completed front-end-of-line transistor fabrication and middle-of-line interconnects for its first RRAM-CMOS validation chip.
  • DVL shares were trading at AUD 0.023, down 8.00% during the afternoon Trading session on 24 August 2026.
  • The completed CMOS foundation allows the wafers to move into dorsaVi’s proprietary RRAM back-end integration phase.
  • Phases 1 and 2 of the validation chip build are now complete, with Phase 3 covering RRAM stack deposition, cell etching and additional interconnect fabrication.
  • The program supports dorsaVi’s roadmap for low-power edge hardware targeting robotics, exoskeletons, autonomous systems and other Physical AI applications.

dorsaVi (ASX:DVL) has completed the foundational CMOS fabrication for its first RRAM-CMOS validation chip, moving the development program into the proprietary RRAM integration stage ahead of eventual electrical testing. The milestone covers completion of both the transistor layer and local interconnects using TSMC’s established CMOS process.

dorsaVi shares were trading at AUD 0.023, down 8.00%, or AUD 0.0020, during the afternoon trading session on 24 August 2026. The stock remained down 42.50%, or AUD 0.02, over the past year.

The company is developing hardware aimed at ultra-edge intelligence, where data processing occurs locally rather than relying on cloud connectivity. Its RRAM work is intended to support low-power memory and computing applications across Physical AI markets.

CMOS Foundation Now Complete

The latest milestone confirms completion of the front-end-of-line and middle-of-line stages of the validation chip.

The front-end-of-line contains the chip’s transistor layer, while the middle-of-line provides the local interconnects that connect those devices.

Together, these two stages create the underlying CMOS platform required before dorsaVi can integrate its proprietary resistive random-access memory architecture.

The company said using TSMC’s established CMOS process provides a proven silicon foundation for the validation chip and allows the development team to focus the next stage on RRAM-specific back-end integration.

This completes Phases 1 and 2 of the build program.

Phase 3 Shifts Focus to Proprietary RRAM Integration

Work will now move into Phase 3, covering the back-end-of-line RRAM integration sequence.

The next steps begin with fabrication of an engineered via structure that will form the RRAM bottom electrode.

This is expected to be followed by deposition of dorsaVi’s proprietary RRAM material stack, RRAM cell etching and the fabrication of subsequent metal lines and interconnects.

The aim is to progress the wafers toward an electrically testable RRAM-CMOS validation chip.

The company has not yet reported electrical performance results, making the integration and subsequent validation stages the key technical milestones still ahead.

RRAM Sits at the Centre of dorsaVi’s Edge Hardware Strategy

dorsaVi is targeting its RRAM technology at applications where computing and memory need to operate close to the sensor.

The company sees this as particularly relevant for Physical AI systems such as robotics, exoskeletons, autonomous vehicles and drones.

These applications can require local processing without relying continuously on cloud infrastructure.

According to dorsaVi, power consumption and memory efficiency can become important constraints as more intelligence is pushed toward edge devices.

Its RRAM development program is aimed at addressing those requirements by supporting non-volatile, low-power local memory and processing capability.

Physical AI Adds a New Technology Layer to Existing Business

dorsaVi’s broader operations include wearable sensor technologies used across workplace, clinical and sports applications.

Its sensor platforms are designed to capture and analyse human movement and position outside laboratory environments.

Alongside these existing applications, the company has been building its ultra-edge technology strategy through Investment in neuromorphic computing and RRAM memory.

The objective is to enable real-time AI-driven decision-making at the point where data is collected.

Management sees this architecture as potentially relevant to environments where latency, power consumption or connectivity can limit dependence on cloud computing.

Development Program Remains Pre-Validation

While the CMOS fabrication milestone moves the project forward, the validation chip still has several technical stages to complete.

RRAM materials must now be successfully integrated with the CMOS platform.

The resulting cells then need to move through back-end processing before electrical testing can occur.

That testing will be important because it will provide the first direct validation of how the proprietary RRAM structure performs on the completed CMOS platform.

The latest announcement therefore represents a fabrication milestone rather than commercial or performance validation.

Management Says Program Remains on Plan

Group Chief Executive Officer Mathew Regan said the dorsaVi–NTU RRAM development program continues to progress in line with the company’s project plan.

He described completion of the CMOS front-end and middle-of-line fabrication as an important step because it provides the physical foundation for integrating the company’s proprietary RRAM technology.

Regan said the program now moves into the RRAM-specific back-end phase ahead of electrical validation.

The company intends to report against further defined milestones as the program progresses.

What Investors May Be Watching

The key issue for dorsaVi is now whether the proprietary RRAM architecture can be successfully integrated into the completed CMOS platform and progress to electrical testing.

Completion of Phases 1 and 2 reduces one part of the development pathway, but the technical risk now shifts toward the RRAM-specific fabrication and validation stages.

Investors may therefore watch for updates on completion of the engineered via structure, RRAM material deposition, cell etching and subsequent electrical validation.

Longer term, the relevance of the program will depend on whether the technology can demonstrate the low-power and edge-processing characteristics required for the Physical AI markets dorsaVi is targeting.