Pathkey.AI Ltd (ASX:PKY) has presented its 2026 Annual General Meeting investor webinar, disclosing that its Chipforge chip design platform has been independently validated end-to-end, with production systems built and ready for a post-MVP release, following a series of milestones since the previous AGM.

Key Points

  • The Chipforge acquisition was completed in June 2026 following shareholder approval, with the acquisition first announced on 29 April 2026.
  • An independent user validated the Chipforge platform end-to-end in October 2026, taking multiple designs from intent through to deployment on a target FPGA without any team input or assistance.
  • Chipforge recorded first-pass rates of 67%, 71%, 71% and 74% across four NVIDIA CVDP benchmark task types, described as 14 to 28 percentage points above compared results.
  • A$2.8 million was raised on 12 August 2026, and Sam Weiss was appointed as strategic advisor on the same date.
  • Production systems are built and ready for post-MVP release as of November 2026.

Chipforge Acquisition and Key Milestones Since Previous AGM

According to the filing, Pathkey.AI announced the Chipforge acquisition on 29 April 2026, with the transaction completed on 23 June 2026 following shareholder approval. A Chipforge contract for a proof of value design followed on 11 August 2026. On 12 August 2026, the company raised A$2.8 million and appointed Sam Weiss as strategic advisor. Professor Anupam Chattopadhyay was appointed to the Advisory Board on 10 September 2026. The company describes Chipforge as engineering intelligence designed to bring silicon to market at the speed of software, operating as a design layer across the full chip design flow.

Independent Validation and NVIDIA CVDP Benchmark Results

The filing states that in October 2026, an independent user took multiple designs from intent through to deployment on a target FPGA and confirmed the platform tested correctly without any team input or assistance. The Chipforge platform was also benchmarked against NVIDIA's publicly available CVDP chip-design benchmarks across four task types: code completion, spec to RTL, code modification, and code debug. The platform recorded first-pass rates of 67%, 71%, 71% and 74% respectively across those tasks, with the filing citing a 14 to 28 percentage point improvement compared with other published results included in the benchmark comparison.

Chipforge Platform Capabilities and Production Readiness

According to the filing, Chipforge is designed to take an engineer's design requirement through design, test, fix and implementation to a verified design on target hardware, with every step recorded. The platform is stated to support tools from AMD, Altera and Lattice, with custom-silicon tool support described as planned for later. The filing also states the platform is built to run on the customer's own computers for designs that cannot leave the building. As of November 2026, production systems are described as built and ready for post-MVP release, with continuous integration, monitoring and alerting in place.